User contributions for Kbriggl
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⧼kip-jumptonavigation⧽⧼kip-jumptosearch⧽
24 January 2023
- 09:4909:49, 24 January 2023 diff hist +154‎ m ILC:ASIC inventory ‎ →‎Mutrig 3
16 January 2023
- 12:4312:43, 16 January 2023 diff hist +6‎ m ILC:ASIC inventory ‎ →‎ASIC inventory
- 12:4212:42, 16 January 2023 diff hist +257‎ m ILC:ASIC inventory ‎ →‎ASIC inventory
26 January 2022
- 14:2414:24, 26 January 2022 diff hist +101‎ ILC:ASIC inventory ‎ →‎MuTRiG V2
21 January 2022
- 11:3811:38, 21 January 2022 diff hist +1‎ ILC:ASIC inventory ‎ →‎MuTRiG V2
- 11:3711:37, 21 January 2022 diff hist +42‎ ILC:ASIC inventory ‎ →‎MuTRiG V2
- 11:3411:34, 21 January 2022 diff hist +155‎ ILC:ASIC inventory ‎ →‎KLauS V6
12 May 2016
- 19:5619:56, 12 May 2016 diff hist +102‎ ILC:ASIC AMS tricks ‎ →‎Setting design parameters to integer type current
- 19:2619:26, 12 May 2016 diff hist +207‎ ILC:ASIC AMS tricks ‎ →‎Setting design parameters to integer type
- 19:2219:22, 12 May 2016 diff hist +852‎ N ILC:ASIC AMS tricks ‎ Created page with " == Setting design parameters to integer type == In some special cases, a parameter given to the netlist should be given as int (standard is real type) This information is s..."
- 19:1219:12, 12 May 2016 diff hist +55‎ ILC:Content ‎ →‎ASIC development notes
2 December 2015
- 11:4711:47, 2 December 2015 diff hist −4‎ ILC:ASICspectreverilogSetup ‎ →‎2. Setting up the Digital cell view current
- 11:4511:45, 2 December 2015 diff hist −64‎ ILC:ASICspectreverilogSetup ‎ →‎3. Testbench and Simulation set-up
- 11:4411:44, 2 December 2015 diff hist +76‎ ILC:ASICspectreverilogSetup ‎No edit summary
- 11:4011:40, 2 December 2015 diff hist +118‎ ILC:ASICspectreverilogSetup ‎No edit summary
- 11:2611:26, 2 December 2015 diff hist +12‎ ILC:ASICspectreverilogSetup ‎No edit summary
- 11:2511:25, 2 December 2015 diff hist +3,037‎ N ILC:ASICspectreverilogSetup ‎ Created page with "'''Introduction & Usefulness''' SpectreVerilog is probably the most simple toolchain to set up a mixed mode simulation. However, the tool has it's limits: # Only verilog sour..."
- 11:0211:02, 2 December 2015 diff hist +92‎ ILC:Content ‎ →‎ASIC development notes
24 November 2015
- 09:1909:19, 24 November 2015 diff hist +2,834‎ N ILC:ASICLicSetup ‎ Created page with "To be able to access licensed EDA tools from outside KIP, you need to set up some tunnels to the KIP lincense servers This entry currently only covers the set-up for Mentor an..." current
- 08:3708:37, 24 November 2015 diff hist +79‎ ILC:Content ‎ →‎ASIC development notes
23 October 2013
- 13:2513:25, 23 October 2013 diff hist +98‎ m ToDo ‎ →‎HiWi current