User contributions for Gsid

3 May 2011

• 16:3116:31, 3 May 2011 diff hist +759‎ ASIC:TSMC65DesignFlow ‎ →‎Create analog unit

28 April 2011

• 13:2513:25, 28 April 2011 diff hist −23‎ ASIC:TSMC65DesignFlow ‎ →‎Get project and create analog unit
• 13:2413:24, 28 April 2011 diff hist +882‎ ASIC:TSMC65DesignFlow ‎ →‎Full custom analog flow
• 13:2113:21, 28 April 2011 diff hist −842‎ ASIC:TSMC65DesignFlow ‎ →‎Get project and create analog unit

20 April 2011

• 13:2113:21, 20 April 2011 diff hist +35‎ ASIC:TSMC65DesignFlow ‎ →‎Mix signal IC - Digital on the top
• 13:2013:20, 20 April 2011 diff hist +26‎ ASIC:TSMC65DesignFlow ‎ →‎Mix signal IC - Digital on the top
• 13:1813:18, 20 April 2011 diff hist 0‎ N File:Compleat flow.png ‎No edit summary current
• 13:1413:14, 20 April 2011 diff hist −10‎ ASIC:TSMC65DesignFlow ‎ →‎Mix signal IC - Digital on the top
• 13:1213:12, 20 April 2011 diff hist +9‎ ASIC:TSMC65DesignFlow ‎ →‎Common naming rules
• 13:0813:08, 20 April 2011 diff hist +1‎ ASIC:TSMC65DesignFlow ‎ →‎Sengin GDS to fab
• 13:0713:07, 20 April 2011 diff hist 0‎ ASIC:TSMC65DesignFlow ‎ →‎Full custom analog flow
• 13:0613:06, 20 April 2011 diff hist 0‎ N File:Analog flow top.png ‎No edit summary current
• 12:5912:59, 20 April 2011 diff hist +96‎ ASIC:TSMC65DesignFlow ‎ →‎Full custom analog flow
• 12:5712:57, 20 April 2011 diff hist +30‎ ASIC:TSMC65DesignFlow ‎ →‎Intro
• 12:5212:52, 20 April 2011 diff hist +14‎ ASIC:TSMC65DesignFlow ‎ →‎Digital on the top
• 12:5012:50, 20 April 2011 diff hist 0‎ ASIC:TSMC65DesignFlow ‎ →‎RTL netlist mapping to technology with Sinopsys DC_SHELL
• 12:4812:48, 20 April 2011 diff hist +33‎ ASIC:TSMC65DesignFlow ‎ →‎Sengin GDS to fab
• 12:4212:42, 20 April 2011 diff hist +240‎ ASIC:TSMC65DesignFlow ‎ →‎Sengin GDS to fab
• 12:3712:37, 20 April 2011 diff hist −49‎ ASIC:TSMC65DesignFlow ‎ →‎ANT
• 12:3712:37, 20 April 2011 diff hist −46‎ ASIC:TSMC65DesignFlow ‎ →‎DRC
• 12:3612:36, 20 April 2011 diff hist +659‎ ASIC:TSMC65DesignFlow ‎ →‎LVS
• 12:2912:29, 20 April 2011 diff hist +34‎ ASIC:TSMC65DesignFlow ‎ →‎ANT
• 12:2012:20, 20 April 2011 diff hist +31‎ ASIC:TSMC65DesignFlow ‎ →‎DRC
• 12:1912:19, 20 April 2011 diff hist +63‎ ASIC:TSMC65DesignFlow ‎ →‎LVS
• 11:1711:17, 20 April 2011 diff hist +10‎ ASIC:TSMC65DesignFlow ‎ →‎Digital on the top
• 11:1511:15, 20 April 2011 diff hist +66‎ ASIC:TSMC65DesignFlow ‎ →‎Digital on the top
• 11:1211:12, 20 April 2011 diff hist +335‎ ASIC:TSMC65DesignFlow ‎ →‎RTL netlist mapping to technology with Sinopsys DC_SHELL
• 11:0811:08, 20 April 2011 diff hist +136‎ ASIC:TSMC65DesignFlow ‎ →‎Digital on the top
• 11:0411:04, 20 April 2011 diff hist +1‎ ASIC:TSMC65DesignFlow ‎ →‎Golden GDS generation
• 11:0411:04, 20 April 2011 diff hist +186‎ ASIC:TSMC65DesignFlow ‎ →‎Golden GDS generation
• 11:0011:00, 20 April 2011 diff hist +395‎ ASIC:TSMC65DesignFlow ‎ →‎Sengin GDS to fab
• 10:5610:56, 20 April 2011 diff hist +1,121‎ ASIC:TSMC65DesignFlow ‎ →‎RTL2GDS layout generation with Cadence Encounter
• 09:4909:49, 20 April 2011 diff hist +24‎ ASIC:TSMC65DesignFlow ‎ →‎Intro
• 09:4709:47, 20 April 2011 diff hist 0‎ N File:Ic general.png ‎No edit summary current
• 09:3309:33, 20 April 2011 diff hist −44‎ ASIC:TSMC65DesignFlow ‎ →‎TODO
• 09:2809:28, 20 April 2011 diff hist +1,225‎ ASIC:TSMC65DesignFlow ‎ →‎Full custom analog flow

19 April 2011

• 14:1014:10, 19 April 2011 diff hist +32‎ ASIC:TSMC65DesignFlow ‎ →‎Full custom analog flow
• 14:0814:08, 19 April 2011 diff hist 0‎ N File:Analog flow block.png ‎No edit summary current
• 14:0614:06, 19 April 2011 diff hist +30‎ ASIC:TSMC65DesignFlow ‎ →‎Full custom analog flow
• 14:0414:04, 19 April 2011 diff hist 0‎ N File:Analog flow top.svg ‎No edit summary current
• 14:0314:03, 19 April 2011 diff hist +855‎ ASIC:TSMC65DesignFlow ‎ →‎Get project and create analog unit
• 12:5512:55, 19 April 2011 diff hist +440‎ ASIC:TSMC65DesignFlow ‎ →‎Get project and create analog unit
• 12:2812:28, 19 April 2011 diff hist +882‎ ASIC:TSMC65DesignFlow ‎ →‎Common naming rules
• 12:0712:07, 19 April 2011 diff hist +166‎ ASIC:TSMC65DesignFlow ‎ →‎Project structure
• 09:4809:48, 19 April 2011 diff hist +1,093‎ ASIC:TSMC65DesignFlow ‎ →‎TODO
• 09:3809:38, 19 April 2011 diff hist +150‎ ASIC:TSMC65DesignFlow ‎ →‎Common naming rules
• 09:3409:34, 19 April 2011 diff hist −96‎ ASIC:TSMC65DesignFlow ‎ →‎Project structure
• 09:2109:21, 19 April 2011 diff hist +982‎ ASIC:TSMC65DesignFlow ‎ →‎Project structure
• 09:0709:07, 19 April 2011 diff hist −479‎ ASIC:TSMC65DesignFlow ‎ →‎Layer information

14 April 2011

• 09:4109:41, 14 April 2011 diff hist +190‎ ASIC:TSMC65DesignFlow ‎ →‎Modules for project